SMC Networks SMC91C95 Manual do Utilizador descarregar pdf (Página 121)

121

FIGURE 29 - ISA CONSECUTIVE READ AND WRITE CYCLES

t20

A0-15

AEN,

nSBHE

nIOCS16

nIOWR

D0-D15

VALID ADDRESS

nIORD

t10

VALID DATA

IOCHRDY

Control Active to IOCHRDY Low

IOCHRDY Low Pulse Width*

Cycle time**

Parameter

min

typ

max

units

100

185

150

t10

t20

*Note: Assuming NO WAIT ST = 0 in configuration register and cycle time observed.

**Note: The cycle time is defined only for accesses to the Data Register as follows:

For Data Register Read - From nIORD falling to next nIORD falling

For Data Register Write - From nIOWR rising to next nIOWR rising

1 2 ... 116 117 118 119 120 121 122 123 124 125 126 ... 138 139

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SMC Networks SMC91C95 Manual do Utilizador Página 121